論文リスト

学術論文

• 別役拓哉, 市川周一: "LFSRを用いたURNGにおける風向データの削減," 電気学会論文誌D, vol. 145, no. 4, (accepted) (2025).
• 市川周一： "画像データとLFSRによる乱数生成手法," 電気学会論文誌D, vol. 145, no. 4, (to appear) (2025).
• 松岡俊佑, 川口秀樹, 市川周一: "超音波測位システムのフェーズシフトアレイによる測位領域の拡大," 日本AEM学会誌，Vol. 32, No. 2, pp. 480--485 (2024). [DOI]
• Naoki Fujieda, Shuichi Ichikawa, Ryusei Oya, Hitomi Kishibe: "Design and implementation of an on-line quality control system for latch-based true random number generator," IEICE Transactions on Information and Systems, vol. E106-D, no.12, pp.1940-1950 (2023). [1.78MB PDF, copyright © 2023 IEICE] [DOI] [IEICE Transactions]
• 鴨狩滉斗, 市川周一: "内蔵LFSRを用いた乱数生成方法の評価," 電気学会論文誌D, vol. 143, no. 2, pp. 87--93 (2023). [DOI] [704 KB PDF, copyright © 2023 IEEJ]
• 千葉歩武, 市川周一: "気象データとLFSRによる乱数生成手法の評価," 電気学会論文誌D, vol. 143, no. 2, pp. 80--86 (2023). [DOI] [672 KB PDF, copyright © 2023 IEEJ]
• 岩原和輝, 市川周一, 藤枝直輝: "高位合成可能なソフトプロセッサにおける専用命令実装手法の評価," 電気学会論文誌D, vol. 143, no. 2, pp. 94--100 (2023). [DOI] [800 KB PDF, copyright © 2023 IEEJ]
• Shunsuke Matsuoka, Shuichi Ichikawa, Naoki Fujieda: "A true random number generator that utilizes thermal noise in a programmable system-on-chip (PSoC)," International Journal of Circuit Theory and Applications, vol. 49, no. 10, pp. 3354-3367 (2021). [DOI] [Sharable Link]
• 正岡秀崇, 市川周一, 藤枝直輝: "内蔵LFSRとサンプリング間隔の揺らぎを利用した乱数生成手法," 電気学会論文誌D, vol. 141, no. 2, pp. 86--92 (2021). [DOI] [738 KB PDF, copyright © 2021 IEEJ]
• 荻堂盛也, 市川周一, 藤枝直輝, 山田親稔, 宮城桂: "動的部分再構成を用いた耐故障化手法のXilinx Zynq-7000 SoCによる試作," 電気学会論文誌D, vol. 141, no. 2, pp. 93--99 (2021). [DOI] [993 KB PDF, copyright © 2021 IEEJ]
• Naoki Fujieda, Masaaki Takeda, Shuichi Ichikawa: "An Analysis of DCM-based True Random Number Generator," IEEE Trans. Circuits and Systems II: Express Briefs, vol. 67, no. 6, pp. 1109--1113 (2020). [DOI] [postprint, copyright © 2019 IEEE]
• 与座章宙, 山田親稔, 宮城桂, 市川周一, 藤枝直輝: "医用画像におけるバイラテラルフィルタのパラメータ決定," 電気学会論文誌C, vol. 139, no. 9, pp. 1008--1014 (2019). [5655 KB PDF, copyright © 2019 IEEJ] [DOI]
• 長濱嗣志, 上原一朗, 宮城桂, 山田親稔, 市川周一: "深層学習による琉球古典音楽のリアルタイム処理推論," 電気学会論文誌C, vol. 139, no. 9, pp. 1001--1007 (2019). [1063 KB PDF, copyright © 2019 IEEJ] [DOI]
• 山田翔太郎, 市川周一, 藤枝直輝： "LegUpとoLLVMによる難読化制御論理回路の実装," 電気学会論文誌C, vol. 139, no. 9, pp. 952--957 (2019). [870 KB PDF, copyright © 2019 IEEJ] [DOI]
• 荻堂盛也, 山田親稔, 宮城桂, 市川周一, 藤枝直輝: "部分再構成を用いたプロセッサの耐故障化手法に関する検討," 電気学会論文誌D, vol. 139, no. 2, pp. 187--192 (2019). [2272 KB PDF, copyright © 2019 IEEJ] [DOI]
• 松田祐希, 宮城桂, 山田親稔, 谷藤正一, 市川周一: "可視光通信向け海中映像伝送システムのFPGA実装," 電気学会論文誌D, vol. 139, no. 2, pp. 180--186 (2019). [1856 KB PDF, copyright © 2019 IEEJ] [DOI]
• 松岡佑海, 藤枝直輝, 市川周一: "難読化ツールoLLVMを用いたハードウェア難読化手法の評価," 電気学会論文誌D, vol. 139, no. 2, pp. 111--118 (2019). [928 KB PDF, copyright © 2019 IEEJ] [DOI]
• 西脇慎太朗, 藤枝直輝, 市川周一: "並列SATソルバのXeon Phiプロセッサ上での性能評価," 電気学会論文誌D, vol. 139, no. 2, pp. 119--126 (2019). [768 KB PDF, copyright © 2019 IEEJ] [DOI]
• 真喜志泰希, 市川周一, 藤枝直輝, 山田親稔, 宮城桂: "分布間距離を用いたBilateral Filterのパラメータ推定法の改良," 電気学会論文誌D, vol. 139, no. 2, pp. 104--110 (2019). [1280 KB PDF, copyright © 2019 IEEJ] [DOI]
• Naoki Fujieda, Shuichi Ichikawa: "A Latch-latch Composition of Metastability-based True Random Number Generator for Xilinx FPGAs," IEICE Electronics Express (ELEX), Vol. 15, No. 10, pp. 1--12 (2018). [1496KB PDF, copyright © 2018 IEICE] [DOI] [ELEX] [IEICE Transactions]
• Naoki Fujieda, Kiyohiro Sato, Ryodai Iwamoto, Shuichi Ichikawa: "Evaluation of Register Number Abstraction for Enhanced Instruction Register Files," IEICE Transactions on Information and Systems, Vol. E101-D, No. 6, pp. 1521--1531 (2018). [1.25MB PDF, copyright © 2018 IEICE] [DOI] [IEICE Transactions]
• Naoki Fujieda, Takumi Shinohara, Shuichi Ichikawa, Yuhki Sakaguchi, Shunsuke Matsuoka, and Hideki Kawaguchi: "Attenuation Model for Error Correction of Ultrasonic Positioning System," IEEJ Journal of Industry Applications, Vol. 7, No. 2, pp. 181--188 (2018). [1056 KB PDF, copyright © 2018 IEEJ] [DOI]
• Naoki Fujieda, Ryo Yamauchi, Hiroki Fujita, Shuichi Ichikawa: "A Virtual Cache for Overlapped Memory Accesses of Path ORAM," International Journal of Networking and Computing, vol. 7, no. 2, pp. 106--123 (2017). [Download PDF] [IJNC]
• 真喜志泰希, 市川周一, 藤枝直輝, 山田親稔： "分布間距離を用いたBilateral Filterの準最適パラメータ探索," 電気学会論文誌D, vol. 137, no. 7, pp. 576--582 (2017). [992 KB PDF, copyright © 2017 IEEJ] [DOI]
• 尾風仁, 山田親稔, 宮城桂, 市川周一： "NWアルゴリズム拡張による配列アラインメントの高速化についての検討," 電気学会論文誌D, vol. 136, no. 10, pp. 686--691 (2016). [1152 KB PDF, copyright © 2016 IEEJ] [DOI]
• 比嘉秀斗, 山田親稔, 宮城桂, 市川周一： "正規表現の先読みに対するマッチングハードウェアの改善," 電気学会論文誌D, vol. 136, no. 10, pp. 692--697 (2016). [1024 KB PDF, copyright © 2016 IEEJ] [DOI]
• 大嶺沢仁, 山田親稔, 宮城桂, 市川周一： "量子暗号Y-00方式の安全性評価に関する検討," 電気学会論文誌D, vol. 136, no. 10, pp. 698--702 (2016). [800 KB PDF, copyright © 2016 IEEJ] [DOI]
• Naoki Fujieda, Tasuku Tanaka, Shuichi Ichikawa: "Design and Implementation of Instruction Indirection for Embedded Software Obfuscation," Microprocessors and Microsystems, Vol. 45, Part A, pp. 115--128 (2016). [DOI] [postprint]
• 三浦慎一郎，市川周一，藤枝直輝，角田和彦： "Intel MICを用いた疎行列のCDS格納形式によるSpMV演算性能について," 数理科学会論文集，vol.17, no.1, pp.3--8 (2016).
• 松岡俊佑, 藤枝直輝，市川周一, 川口秀樹： "超音波を用いたリアルタイム位置測位システムの開発," 日本AEM学会誌, vol.23, no.2, pp.380--385 (2015). [DOI]
• Naoki Fujieda, Shuichi Ichikawa: "An XOR-based Parameterization for Instruction Register Files," IEEJ Transactions on Electrical and Electronic Engineering, vol. 10, no. 5, pp. 592--602 (2015). [DOI] [preprint]
• 真喜志泰希, 山田親稔, 荻野正, 市川周一: "分布間距離を用いたBilateral Filter のパラメータ推定法の一考察," 電気学会論文誌D, vol. 135, no. 2, pp. 87--92 (2015). [2624KB PDF, copyright © 2015 IEEJ] [DOI link]
• 佐渡山史矢, 山田親稔, 市川周一, 荻野正: "単一画像を用いた再構成型超解像合成手法の検討," 電気学会論文誌D, vol. 135, no. 2, pp. 81--86 (2015). [1984KB PDF, copyright © 2015 IEEJ] [DOI link]
• Hisashi Hata, Shuichi Ichikawa: "FPGA Implementation of Metastability-based True Random Number Generator," IEICE Transactions on Information and Systems, Vol. E95-D, No. 2, pp. 426--436 (2012). [708KB PDF, copyright © 2012 IEICE] [DOI link] [abstract and PDF from IEICE] [IEICE Transactions]
• 松岡俊佑, 日野善規, 市川周一: "AES暗号とCamellia暗号に対する暗号鍵を固定したハードウェア特殊化回路," 電子情報通信学会論文誌 D, Vol. J94-D, No. 10, pp. 1696-1700 (2011). [1.79MB PDF, copyright © 2011 IEICE] [abstract and PDF from IEICE] [IEICE Transactions]
• Shuichi Ichikawa, Masanori Akinaka, Hisashi Hata, Ryo Ikeda, Hiroshi Yamamoto: "An FPGA implementation of hard-wired sequence control system based on PLC software," IEEJ Transactions on Electrical and Electronic Engineering, Vol. 6, No. 4, pp. 367--375 (2011). [DOI link] [IEEJ Transactions on Electrical and Electronic Engineering] [preprint]
• Shuichi Ichikawa, Sho Takahashi, Yuu Kawai: "Optimizing Process Allocation of Parallel Programs for Heterogeneous Clusters," Concurrency and Computation: Practice and Experience, Vol. 21, No. 4, pp. 475--507 (2009). [DOI link] [Concurrency and Computation: Practice and Experience] [preprint]
• Shuichi Ichikawa, Takashi Sawada, Hisashi Hata: "Diversification of Processors Based on Redundancy in Instruction Set," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E91-A, No.1, pp. 211--220 (2008). [243KB PDF, copyright © 2008 IEICE] [DOI link] [abstract and PDF from IEICE] [IEICE Transactions]
• Ryoichiro Atono, Shuichi Ichikawa: "Design and Evaluation of Data-dependent Hardware for AES Encryption Algorithm," IEICE Transactions on Information and Systems, Vol. E89-D, No.7, pp. 2301--2305 (2006). [118KB PDF, copyright © 2006 IEICE] [DOI link] [abstract and PDF from IEICE] [IEICE Transactions]
• Kazuhiro Hattanda, Shuichi Ichikawa: "Redundancy in Instruction Sequences of Computer Programs," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E89-A, No. 1, pp. 219--221 (2006). [168KB PDF, copyright © 2006 IEICE] [DOI link] [abstract and PDF from IEICE] [IEICE Transactions]
• Shiro Konuma, Shuichi Ichikawa: "Design and Evaluation of Hardware Pseudo-Random Number Generator MT19937," IEICE Transactions on Information and Systems, Vol. E88-D, No. 12, pp. 2876--2879 (2005). [106KB PDF, copyright © 2005 IEICE] [DOI link] [abstract and PDF from IEICE] [IEICE Transactions]
• Yoshinori Kishimoto, Shuichi Ichikawa: "Optimizing the Configuration of a Heterogeneous Cluster with Multiprocessing and Execution-Time Estimation," Parallel Computing, Vol. 31, No. 7, pp. 691--710 (2005). [DOI link] [Parallel Computing] [preprint]
• Shoji Yamamoto, Shuichi Ichikawa, Hiroshi Yamamoto: "The Design and Evaluation of Data-Dependent Hardware for Subgraph Isomorphism Problem," IEICE Transactions on Information and Systems, Vol. E87-D, No. 8, pp. 2038--2047 (2004). [473KB PDF, copyright © 2004 IEICE] [abstract and PDF from IEICE] [IEICE Transactions]
• Kazuhiro Hattanda, Shuichi Ichikawa: "The Evaluation of Davidson's Digital Signature Scheme," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E87-A, No. 1, pp. 224--225 (2004). [153KB PDF, copyright © 2004 IEICE] [abstract and PDF from IEICE] [IEICE Transactions]
• Shuichi Ichikawa, Hidemitsu Saito, Lerdtanaseangtham Udorn, Kouji Konishi: "Trade-offs in Custom Circuit Designs for Subgraph Isomorphism Problem," IEICE Transactions on Information and Systems, Vol. E86-D, No. 7, pp. 1250--1257 (2003). [329KB PDF, copyright © 2003 IEICE] [abstract and PDF from IEICE] [IEICE Transactions]
• Shuichi Ichikawa, Shoji Yamamoto: "Data Dependent Circuit for Subgraph Isomorphism Problem," IEICE Transactions on Information and Systems, Vol. E86-D, No. 5, pp. 796--802 (2003). [261KB PDF, copyright © 2003 IEICE] [abstract and PDF from IEICE] [IEICE Transactions]
• Shuichi Ichikawa, Hiroshi Chiyama, Kazuhiko Akabane: "Redundancy in 3D Polygon Models and Its Application to Digital Signature," Journal of WSCG, Vol. 10, No. 1, pp. 225--232 (2002). (Special Issue WSCG 2002 - FULL papers - 10th Int'l Conf. Central Europe on Computer Graphics, Visualization and Computer Vision 2002) [abstract] [download 107KB PDF] [WSCG]
• 市川周一，山下真史: "分散処理環境における数値シミュレーションの静的負荷分散手法," 情報処理学会論文誌, Vol. 42, No. 3, pp. 552--564 (2001). [352KB PDF] [利用上の注意] [CiNii]
• 市川周一, L. Udorn, 小西幸治: "部分グラフ同型判定アルゴリズムのFPGAによる実装と評価," 情報処理学会論文誌ハイパフォーマンスコンピューティングシステム, Vol. 41, No. SIG5 (HPS1), pp. 39--49 (2000). [728KB PDF] [利用上の注意] [CiNii]
• 市川周一, 川合隆光, 島田俊夫: "組合せ最適化による並列数値シミュレーションの静的負荷分散," 情報処理学会論文誌, Vol. 39, No. 6, pp.1746--1756 (1998). [1416KB PDF] [利用上の注意] [CiNii]
• 川合隆光, 市川周一, 島田俊夫: "並列数値シミュレーション用高水準言語NSL," 情報処理学会論文誌, Vol.38, No.5, pp.1058--1067 (1997). [CiNii]
• 市川周一，佐藤三久，後藤英一： "範囲検査アドレッシングを有するFLATS2アーキテクチャと性能評価," 電子情報通信学会論文誌 D-I, Vol. J74-D-I, No.5, pp. 329--338 (May 1991). [677KB PDF, copyright © 1991 IEICE] [abstract and PDF from IEICE] [IEICE Transactions]
  • Shuichi Ichikawa, Mitsuhisa Sato, Eiichi Goto: "Evaluation of Range-Checking Addressing Modes and the Architecture of FLATS2," Systems and Computers in Japan, Vol. 23, No. 10, pp. 1--13 (1992). [DOI link]
• Nobuaki Yoshida, Eiichi Goto, Shuichi Ichikawa: "Pseudo-Random Rounding for Truncated Multipliers," IEEE Transactions on Computers, Vol. 40, No. 9, pp. 1065--1067 (Sep. 1991). [DOI link]
• Kentaro Shimizu, Eiichi Goto, Shuichi Ichikawa: "CPC (Cyclic Pipeline Computer) - An Architecture Suited for Josephson and Pipelined Machines," IEEE Transactions on Computers, Vol. 38, No. 6, pp. 825--832 (Jun. 1989). [DOI link]

査読のある会議など

• Ayumu Chiba, Shuichi Ichikawa: "Random number generation based on cryptocurrency prices and linear feedback shift register," Proc. Twelfth International Symposium on Computing and Networking (CANDAR 2024), (accepted) (2024).
• Shuichi Ichikawa: "Pseudo-Random Number Generation by Staggered Sampling of LFSR," Proc. Eleventh International Symposium on Computing and Networking (CANDAR 2023), pp. 134--140 (2023). [DOI] [preprint]
• I. Uehara, C. Yamada, H. Kamehama, K. Miyagi, S. Ichikawa: "Comparison of Processors for Real-time Homography Transformation," The 1st KOSEN Research International Symposium (KRIS 2023), Poster No. 109 (2023).
• T.Uehara, C. Yamada, H. Kamehama, K. Miyagi, S. Ichikawa: "Hardware implementation of learning super-resolution processing," The 1st KOSEN Research International Symposium (KRIS 2023), Poster No. 37 (2023).
• Ryusei Oya, Naoki Fujieda, Shuichi Ichikawa: "An HLS implementation of on-the-fly randomness test for TRNGs," Proc. Tenth International Symposium on Computing and Networking (CANDAR 2022), pp. 151-157 (2022). (Outstanding Paper Award) [DOI] [preprint]
• 松岡俊佑, 市川周一: "マイコンおよび FPGA 内蔵の AD 変換器を用いた真性乱数生成器の検証," 第35回 回路とシステムワークショップ, WIP2-2 (2022).
• Shotaro Yamada, Shuichi Ichikawa: "Netlist-based measures for hardware obfuscation: A preliminary study," Proc. 2020 Eighth International Symposium on Computing and Networking Workshops (CANDARW 2020), pp. 116--119 (2020). [DOI]
• Naoki Fujieda, Hitomi Kishibe, Shuichi Ichikawa: "A light-weight implementation of latch-based true random number generator," Proc. 15th International Wireless Communications & Mobile Computing Conference (IWCMC 2019), pp. 901--906 (2019). [DOI] [postprint]
• Hiroki Fujita, Naoki Fujieda, Shuichi Ichikawa: "An Analysis on Randomness of Path ORAM for Light-weight Implementation," Proc. Sixth International Symposium on Computing and Networking Workshops (CANDARW 2018), pp. 163--165 (2018). [DOI]
• Naoki Fujieda, Yusuke Ayuzawa, Masato Hongo, Shuichi Ichikawa: "A Multiple Clock Domain Design of High-radix Montgomery Multiplication for Simplicity," Proc. 2018 IEEE Region 10 Conference (TENCON 2018), pp. 1489--1492 (2018). [DOI] [postprint]
• 高橋真悟, "超音波測位システムの受信号減衰特性を利用した距離補正," The 37th JSST Annual International Conference on Simulation Technology (JSST 2018), Student session, P09 (2018).
• 伊藤大道, 松岡俊佑, 川口秀樹, 藤枝直輝, 市川周一: "超音波測位システムのアレイ送信機を用いた指向性の改善," The 37th JSST Annual International Conference on Simulation Technology (JSST 2018), Student session, P10 (2018).
• 与座章宙, 山田親稔, 宮城桂, 市川周一: "医用画像におけるバイラテラルフィルタの有効な繰り返し回数の検討," 第23回知能メカトロニクスワークショップ, 1B1-4 (2018).
• 山田翔太郎, 市川周一, 藤枝直輝: "難読化制御論理回路のLegUpによる試作," 第23回知能メカトロニクスワークショップ, 2B4-2 (2018).
• 坂本譲二, 藤枝直輝, 市川周一: "高位合成で生成されたプロセッサに対する特殊命令実装の検討," 2nd cross-disciplinary Workshop on Computing Systems, Infrastructures, and Programming (xSIG 2018), Session 5B (2018).
• Yoshiki Ishigaki, Naoki Fujieda, Yuumi Matsuoka, Kazuki Uyama, Shuichi Ichikawa: "An Obfuscated Hardwired Sequence Control System Generated by High Level Synthesis," Proc. Fifth International Symposium on Computing and Networking (CANDAR 2017), pp. 323--325 (2017). [DOI]
• Seiya Ogido, Chikatoshi Yamada, Kei Miyagi, Shuichi Ichikawa: "A Study of a Fault-tolerant System Using Dynamic Partial Reconfiguration," Proc. Fifth International Symposium on Computing and Networking (CANDAR 2017), pp. 600--602 (2017). [DOI]
• Naoki Fujieda, Shuichi Ichikawa, Yoshiki Ishigaki, Tasuku Tanaka: "Evaluation of the hardwired sequence control system generated by high-level synthesis," Proc. 26th IEEE International Symposium on Industrial Electronics (ISIE 2017), pp. 1261--1267 (2017). [DOI] [postprint]
• Naoki Fujieda, Ryo Yamauchi, Shuichi Ichikawa: "Last Path Caching: A Simple Way to Remove Redundant Memory Accesses of Path ORAM," Proc. Fourth International Symposium on Computing and Networking (CANDAR 2016), pp.347--353 (2016). [DOI] [postprint]
• 松岡俊佑，藤枝直輝，市川 周一： "ホワイトボックスAES暗号回路の実装と回路難読化の評価," 第29回 回路とシステムワークショップ, pp. 25--29 (2016).
• Naoki Fujieda, Kiyohiro Sato, Shuichi Ichikawa: "A Complement to Enhanced Instruction Register File against Embedded Software Falsification," Proc. ACM SIGPLAN on Program Protection and Reverse Engineering Workshop 2015 (PPREW'15), Article No. 3, pp. 1--7 (2015). [DOI] [download from ACM]
• Shunsuke Matsuoka, Naoki Fujieda, Shuichi Ichikawa: "S-Box Absorption Design for Key-Specific AES circuits," Proc. International Conference of Global Network for Innovative Technology (IGNITE2014), pp. 316--319 (2014).
• Yusuke Ayuzawa, Naoki Fujieda, Shuichi Ichikawa: "Design Trade-offs in SHA-3 Multi-Message Hashing on FPGAs," Proc. IEEE TENCON 2014 (2014). [DOI]
• Taiki Makishi, Shuichi Ichikawa, Tadashi Ogino, Chikatoshi Yamada: "An Efficient Estimation Parameter Method of Bilateral Filter Using Distribution Distance," Proc. IEEE TENCON 2014 (2014). [DOI]
• Naoki Fujieda, Shuichi Ichikawa: "Enhanced Instruction Register Files for Embedded Software Obfuscation," Proceedings of the 29th International Conference on Computers and Their Applications (CATA-2014), pp.153--158 (2014). (Best Paper Award Finalist)
• Naoki Fujieda, Shuichi Ichikawa: "An XOR-based approach to merging entries for instruction register files," Proceedings of First International Symposium on Computing and Networking (CANDAR 2013), pp. 332--337 (2013). [DOI link]
• Shunsuke Matsuoka, Shuichi Ichikawa: "Reduction of Power Consumption in Key-specific AES circuits," Proceedings of the Third International Conference on Networking and Computing (ICNC 2012), pp. 323--325 (2012). [DOI link]
• Satoru Tamura, Chikatoshi Yamada, Shuichi Ichikawa: "Implementation and Evaluation of Modular Multiplication Based on Coarsely Integrated Operand Scanning," Proceedings of the Third International Conference on Networking and Computing (ICNC 2012), pp. 334--335 (2012). [DOI link]
• Muh Syafiq Irsyadi, Shuichi Ichikawa: "Two Hardware Designs of BLAKE-256 Based on Final Round Tweak," Proceedings of the 2011 IEEE Region 10 Conference (TENCON 2011), pp. 350--354 (2011). [DOI link] [download 180KB PDF © IEEE]
• Yasuaki Tezuka, Shuichi Ichikawa, Yoshiyuki Noda: "Design and Implementation of Hard-wired Tracking Control System," Proceedings of the 2010 IEEE Region 10 Conference (TENCON 2010), pp. 299--304 (2010). [DOI link] [download 277KB PDF © IEEE]
• Yasuaki Tezuka, Shuichi Ichikawa, Yoshiyuki Noda: "Evaluation of the Hardware Specialization Techniques for Vibration Control Applications," Proceedings of the IEEE Symposium on Industrial Electronics and Applications (ISIEA 2010), pp. 579--584 (2010). [DOI link] [download 206KB PDF © IEEE]
• Shuichi Ichikawa, Shoichiro Takagi: "Estimating the Optimal Configuration of a Multi-Core Cluster: A Preliminary Study," Proceedings of the International Conference on Complex, Intelligent and Software Intensive Systems (CISIS 2009), pp. 1245--1251 (2009). [DOI link] [Download PDF from IEEE-CS] [download 268KB PDF © IEEE]
• Shuichi Ichikawa, Masayoshi Asakura, Yusuke Sakumoto: "Estimating the Optimal Configuration of a Heterogeneous Cluster: the Case of NAS Parallel Benchmarks," Proceedings of 8th International Conference on Applications and Principles of Information Science (APIS 2009), pp.241--244 (2009). [178KB PDF]
• Shuichi Ichikawa, Yuu Kawai: "Constructing Execution-Time Estimation Models from Diverse Processing Elements of Heterogeneous Clusters," Proceedings of IEEE TENCON 2008, pp. 1--6 (2008). (CDROM) [DOI link] [download 210KB PDF © IEEE]
• Shuichi Ichikawa, Masanori Akinaka, Ryo Ikeda, Hiroshi Yamamoto: "Converting PLC instruction sequence into logic circuit: A preliminary study," Proceedings of 2006 IEEE International Symposium on Industrial Electronics (ISIE '06), pp. 2930--2935 (2006). [DOI link] [download 580KB PDF © IEEE]
• Shuichi Ichikawa, Naohiro Kobayashi: "Preliminary Study of Custom Computing Hardware for the 3x+1 Problem," Proceedings of IEEE TENCON 2004, Vol. D, pp. 387--390 (2004). [DOI link] [download 74KB PDF © IEEE]
• 高橋翔, 市川周一: “走査透過電子顕微鏡の実時間収差補正システムの予備的検討,” Proceedings of SACSIS2004, pp. 127--128 (2004). [利用上の注意] [82KB PDF]
• Yoshinori Kishimoto, Shuichi Ichikawa: "An Execution-Time Estimation Model for Heterogeneous Clusters," 13th Heterogeneous Computing Workshop (HCW 2004), in Proceedings of 18th International Parallel and Distributed Processing Symposium (IPDPS'04), IEEE Computer Society (2004). (CD-ROM) [DOI link] [download 316KB PDF © IEEE]
• Shoji Yamamoto, Shuichi Ichikawa, Hiroshi Yamamoto: "Data Dependent Circuit Design: A Case Study," Proceedings of 13th Int'l Conf. on Field Programmable Logic and Applications (FPL 2003), LNCS 2778, Springer, pp. 1024--1027 (2003). [abstract and PDF from Springer] [download 256KB PDF © Springer-Verlag] [LNCS homepage]
• 岸本芳典, 市川周一: "不均一クラスタ上での実行時間予測モデルとその評価," Proceedings of SACSIS2003, pp. 167--168 (2003). [利用上の注意] [98KB PDF]
• 山本昌治, 市川周一, 山本浩司: "部分グラフ同型判定のためのデータ依存回路の実装と評価," Proceedings of SACSIS2003, pp. 181--182 (2003). [利用上の注意] [78KB PDF]
• Shuichi Ichikawa, Shoji Yamamoto: "Data Dependent Circuit for Subgraph Isomorphism Problem," Proceedings of 12th Int'l Conf. on Field Programmable Logic and Applications (FPL 2002), LNCS 2438, Springer, pp. 1068--1071 (2002). [abstract and PDF from Springer] [download 80KB PDF © Springer-Verlag] [LNCS homepage]
• 岸本芳典, 市川周一: "不均一クラスタ上での並列Linpackの性能に関する検討," Proceedings of JSPP2002, pp. 177--178 (2002). [利用上の注意] [76KB PDF]
• 山本昌治, 市川周一: "データ依存回路による部分グラフ同型判定," Proceedings of JSPP2002, pp. 175--176 (2002). [利用上の注意] [83KB PDF]
• Shuichi Ichikawa, Yoshikatsu Fujimura: "Iterative Data Partitioning Scheme of Parallel PDE Solver for Heterogeneous Computing Cluster," Proceedings of IASTED Int'l Conf. Applied Informatics: Int'l Symp. Parallel and Distributed Computing and Networks, ACTA Press, pp. 364--369 (2002). [abstract] [87K pdf]
• Shuichi Ichikawa, Hidemitsu Saito, Lerdtanaseangtham Udorn, Kouji Konishi: "Evaluation of Accelerator Designs for Subgraph Isomorphism Problem," Proceedings of 10th Int'l Conf. on Field Programmable Logic and Applications (FPL 2000), LNCS 1896, Springer, pp. 729--738 (2000). [abstract] [download 176KB PDF © Springer-Verlag] [abstract and PDF from Springer] [LNCS homepage]
• Shuichi Ichikawa, Shinji Yamashita: "Static Load Balancing of Parallel PDE Solver for Distributed Computing Environment," Proceedings of ISCA 13th Int'l Conf. Parallel and Distributed Computing Systems (PDCS-2000), pp. 399--405 (2000). [abstract] [192KB pdf]
• 藤村佳克, 市川周一: "反復的データ分割による数値シミュレーションの静的負荷分散," Proceedings of JSPP2000, p. 171 (2000). (extended abstract) [利用上の注意] [24KB ps.gz] [46KB pdf]
• Shuichi Ichikawa, Lerdtanaseangtham Udorn, Kouji Konishi: "Hardware Accelerator for Subgraph Isomorphism Problems," Proceedings of Eighth IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'00), pp. 283--284 (2000). [abstract] [DOI link] [download 140KB PDF © IEEE]
• 山下真史, 市川周一: "分散処理環境における数値シミュレーションの静的負荷分散手法," Proceedings of JSPP '99, p. 204 (1999). [利用上の注意] [18KB ps.gz] [40KB pdf]
• 藤村佳克, 市川周一: "並列数値シミュレーションの静的負荷分散法の拡張について," Proceedings of JSPP '99, p. 203 (1999). [利用上の注意] [18KB ps.gz] [45KB pdf]
• Takamitsu Kawai, Shuichi Ichikawa, Toshio Shimada: "NSL: High-Level Language for Parallel Numerical Simulation," Proceedings of the IASTED International Conference Modeling and Simulation (MS '99), pp. 208--213 (1999).
• Shuichi Ichikawa, Takamitsu Kawai, Toshio Shimada: "Enhanced Optimization Scheme for Parallel PDE Solver of NSL," Proceedings of Joint Symposium on Parallel Processing 1998 (JSPP '98), p. 143 (1998). [IPSJ Copyright Notice] [22K ps.gz] [16K pdf]
• Shuichi Ichikawa, Takamitsu Kawai, Toshio Shimada: "Mathematical Programming Approach for Static Load Balancing of Parallel PDE Solver," Proceedings of the 16th IASTED International Conference on Applied Informatics, pp. 112--114 (1998). [44K ps.gz] [40K pdf]
• 市川周一，島田俊夫： "パーソナル・コンピューティング指向の動的再構成可能PCIカード," 第５回 FPGA/PLD Design Conference & Exhibit, pp. 269--277 (1997). [160KB ps.gz] [120KB pdf] [CiNii]
• Takamitsu Kawai, Shuichi Ichikawa, Toshio Shimada: "NSL: Parallel Numerical Simulation Language," Proceedings of '97 RWC Symp. TR-96001, pp.545--546 (1997).
• Takamitsu Kawai, Shuichi Ichikawa, Toshio Shimada: "Research on Parallel Numerical Simulation Language," Proceedings of '95 RWC Symp. TR-95001, pp.109--110 (1995).
• Mitsuhisa Sato, Shuichi Ichikawa, Eiichi Goto: "Multiple Instruction Streams in a Highly Pipelined Processor," Second IEEE Symp. on Parallel and Distributed Processing, pp. 182--189 (Dec. 1990). [DOI link]
• Mitsuhisa Sato, Shuichi Ichikawa, Eiichi Goto: "Run-Time Checking in Lisp by Integrating Memory Addressing and Range Checking," 16th Int'l Symp. on Computer Architecture, pp. 290--297 (May. 1989). [DOI link]

書籍など

• 寺嶋一彦監修： 今後の高齢化社会に求められる 生活支援（福祉・介護・リハビリ）ロボット技術, 5章第1節　組込みソフト, pp.295--299, 情報機構 (2015).
• 市川周一: "計算困難問題と専用計算回路," アルゴリズム工学, 6.27節, pp. 270--271, 共立出版 (2001)．
• 相磯秀夫(監修): 情報技術用語大辞典, オーム社, 2001年3月． (編集執筆委員として)
• Shuichi Ichikawa, Eiichi Goto: "Evaluation of FLATS2 Instruction Set Architecture," Advances in Quantum Flux Parametron Computer Design (Eiichi Goto, Y. Wada, K. Loe Ed.), World Scientific, pp. 221--238 (1992).
• Mitsuhisa Sato, Shuichi Ichikawa, Eiichi Goto: "Multiple Instruction Streams in a Highly Pipelined Processor," Advances in Quantum Flux Parametron Computer Design (E. Goto, Y. Wada, K. Loe Ed.), World Scientific, pp. 156--178 (1992).

翻訳

• スコット・ナスター: 続マッキントッシュの道具箱, パーソナルメディア (1988). (鈴木正幸, 市川周一 共訳)
• G. J. チェイティン: 数学に潜むランダム性, サイエンス日本語版, 1988年9月号, pp. 90--97 (1988). (深沢紀博, 佐藤三久, 市川周一 共訳)
• M. J. Bach, S. J. Buroff: マルチプロセッサUNIXオペレーティング・システム, UNIX原典, pp. 183--201, パーソナルメディア (1987).
• G. J. Henry: 適正割当てスケジューラ, UNIX原典, pp. 309--322, パーソナルメディア (1987).
• T. E. Flitz, J. E. Hefner, T. M. Raleigh: UNIXが稼働する計算機のネットワーク, UNIX原典, pp. 343--364, パーソナルメディア (1987).
• P. D. Hester, J. T. Hollaway, F. T. May: IBM RT PC ハードウェアについて, 高機能ワークステーション, 2.2節, pp. 42--48, 共立出版 (1987).
• P. D. Hester, R. O. Simpson, A. Chang: IBM RT PCとメモリ管理ユニットのアーキテクチャ, 高機能ワークステーション, 2.2節, pp. 48--56, 共立出版 (1987).

学位論文

• 市川周一: "循環パイプライン計算機FLATS2の研究," 博士論文, 東京大学, 平成3年2月21日. [DOI link]

研究会・大会発表等

• 研究会発表等はこちらを御覧ください